This invention generally relates to micro-fabrication of integrated circuits and, particularly, to an improved process and apparatus for pattern formation on semiconductor wafers to form such circuits.
Within the semiconductor industry, production of electronic circuits by very large scale integration ("VLSI") techniques is constrained by a variety of factors which limit yield and inhibit process flexibility. These detrimental factors include, for example, the exposure of wafers to contaminants and/or oxidation during fabrication. Such processing constraints adversely affect mass production of integrated circuits. In addition, conventional processes are slow and inordinately expensive for the fabrication of low-volume products, thus posing an impediment to new device and circuit designs.
Processes for micro-texturing and patterning semiconductor wafers typically rely on lithographic transfer of the desired image from a thin-film of radiation-sensitive resist material. The process entails the formation of a sacrificial layer, the "resist", which is photo-lithographically patterned.
The patterning of the resist involves several steps, including exposing the resist to a selected light source through a suitable mask to record a latent image of the mask and then developing and removing selected regions of the resist. For a "positive" resist, the exposed regions are removed; while for a "negative" resist, the unexposed regions are removed.
For example, in conventional processes using a deposited polymeric resist, the film is exposed with visible or near UV light, electrons or x-rays to induce chain sission (in the case of a positive resist) or cross-linking (in a negative resist) of the polymeric resist material, followed by development in an organic solvent. The pattern can be transferred into surface texture in the wafer by etching with a reactive gas using the patterned resist as a protective masking layer. Alternatively, when a wafer is "masked" by the resist pattern, it can be processed to form active electronic devices and circuits by depositing conductive or semiconductive materials or implanting dopants into etched wells and other surface structures.
Conventional micro-fabrication processes require a number of wet processing steps. For example, there is a general trend towards the use of organic polymer materials as resists, such as Novolack resins, polyesters, or polyimides. These materials are typically spun cast onto the wafer as a thin film (e.g., about 0.1 to 3.0 microns thick) from a wet polymeric solution, such as monoethyl ether or chlorobenzene. In addition, the development steps (in which regions of the resist are removed) typically involve treating the exposed film with another liquid solvent.
The use of conventional wet deposition and developing solutions is a major source of contamination and, consequently, defects in the fabrication of integrated circuits because such wet processing steps typically involve breaks in vacuum or controlled-ambient conditions. Whenever this occurs, the surfaces of the wafer can begin to oxidize in the air or become exposed to airborne chemical and particulate contamination. As a result, the wafer surfaces often must be cleaned and dried before the next processing step can commence. The deposition, development, cleaning and drying operations typically are time-consuming and reduce the through-put of the overall fabrication process. Moreover, the liquid solvents, themselves, can also be major sources of active corrosion or chemical contamination and thereby contribute further defects to the circuit or adversely affect dimensional control.
Another major source of contamination during integrated circuit fabrication is introduced by human operators working in the manufacturing clean room. Human operators are presently required in the clean room, for example, for process set-up and monitoring and transfer of wafers between process stations. It has been estimated that an operator making only light hand and arm movements sheds approximately 6000 particles per minute of a size equal to or larger than 0.3 microns. Successful wafer fabrication can not allow even one such particle per square centimeter to accumulate on the wafer over the processing cycle which can last several weeks. At present, the problem of human contamination of wafers during processing is addressed largely by protective garments and air filtration technology.
It is an object of the invention to provide improved processes and systems for pattern formation on integrated circuit wafers.
It is a further object of the invention to provide simpler processes and systems for patterning such wafers while exposing the wafers to a reduced level of contaminants and while limiting the interaction of humans during processing.
It is yet another object of the invention to provide more flexible, economic and automated processes and systems for patterning wafers with high resolution.